Okay, here's my conjecture:
On the CPU board, power for the CPU and RAM both come from the battery backup supply on pin 5 of the inter-board connector. So with the battery connected, the CPU remains powered.
Now turn your attention to the analogue board, around the power supply circuitry. The power switch either feeds 6V to the 6V power rail, or connects it to ground through a 1k resistor, presumably to discharge any decoupling caps - why, I don't know. Meanwhile the other pole of the power switch is connected to two inverters in IC2 via a couple of resistors, a diode and a capacitor. When the battery voltage is applied to the cathode end of D1, C14 charges through R32. The rising voltage is "cleaned up" by the Schmitt trigger formed by IC2 and R33, and after a couple of milliseconds the output of the right-hand inverter will go high. This releases /HLT allowing the CPU to run.
When you turn the power off, C14 will discharge quickly through D1 and R63, pulling /HLT low and stopping the CPU.
So it's my guess that if you just yank the power supply out, the CPU will continue to run as things collapse around it, and every so often this will cause it to write garbage to the RAM - perhaps if the power goes off as it is writing.